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NGPC link-port passive interposer specification

Status: electrically specified; connector geometry and pin count require measurement from physical hardware before PCB layout.

Which board is this?

This is a passive observation breakout you insert in series with an original cable — distinct from the hardware sniffer in ngpc_link_sniffer/, which reproduces the crossover itself and needs no original cable. The spec predates the hardware capture; for the confirmed pinout (GND = centre contact) see Cable & pinout.

This document is a build specification for a non-driving breakout inserted between one Neo Geo Pocket/Neo Geo Pocket Color console and an original link cable. Its purpose is to expose every conductor to an oscilloscope or logic analyzer without cutting or electrically modifying the original cable.

The safest first build is two identical interposers, one at each console. A single interposer can observe all conductors at one endpoint; two make signal direction, cable crossing, propagation, and handshake behavior unambiguous.

1. Functional requirements

The assembled board shall:

  1. Mate with the console link port on J_CONSOLE.
  2. Accept an original link-cable plug on J_CABLE.
  3. connect each console-side contact to the corresponding cable-side contact without intentional crossing, buffering, inversion, pull-ups, or pull-downs;
  4. expose every contact on individually labeled analyzer test points;
  5. expose connector shell/shield separately from signal ground until physical continuity measurements prove they are the same net;
  6. add no active electronics and never drive the console;
  7. provide mechanical strain relief so analyzer leads cannot load the console connector.

This board is an endpoint extension, so its main path is one-to-one. Any TX/RX or handshake crossing performed by the original cable remains in the original cable.

2. Unknowns that must not be guessed

Before schematic capture or footprint design, record:

  • the number of electrical contacts, N;
  • contact pitch and individual contact width;
  • plug and receptacle opening width, height, and insertion depth;
  • keying, latch, shell, and polarization geometry;
  • contact numbering as seen looking into the console and into the cable plug;
  • whether the metal shell is connected to a contact, PCB ground, or neither;
  • whether compatible male and female connectors can be purchased.

Do not label physical contacts as TXD, RXD, RTS, CTS, supply, or ground in the PCB design. Use neutral labels P01 through P0N until continuity and powered voltage measurements establish their functions.

The PCB designer should receive an original cable and, ideally, a non-working or disassembled console for measurement. Photographs alone are not sufficient to guarantee safe mating geometry. If commercial connectors cannot be found, the connector interface becomes a custom mechanical part, not a normal PCB fabrication task; see section 8.

3. Electrical schematic

Use the following circuit once N is known. Repeat the channel once for every contact:

                 MAIN PASS-THROUGH
J_CONSOLE.P01 o-----------------------------o J_CABLE.P01
                |
                +--- R_TAP01 ---o TP_P01

J_CONSOLE.P02 o-----------------------------o J_CABLE.P02
                |
                +--- R_TAP02 ---o TP_P02

                    repeat through P0N

J_CONSOLE.SHELL o---------------------------o J_CABLE.SHELL
                |
                +----------------o TP_SHELL

Requirements:

  • Main pass-through traces contain no series components or jumpers.
  • R_TAPxx is fitted as 1.0 kOhm, 0402 or 0603, 1%. It is in the analyzer branch only, never in the console-to-cable path. It limits accidental probe current and helps isolate analyzer-lead capacitance.
  • Place an unpopulated resistor footprint R_SG, default DNP, between SHELL and the eventually confirmed signal-ground net. Do not populate it until measurements justify doing so.
  • Do not fit LEDs, level shifters, bus transceivers, pull resistors, termination, or high-capacitance TVS devices in revision A.
  • Do not connect any contact to a PCB ground plane until its identity has been physically confirmed. Revision A should have no global copper ground plane.

The interposer is a passive measurement accessory, not an isolation device. Analyzer voltage compatibility must be checked separately.

4. Analyzer connections

Provide both of the following:

4.1 Individual test points

  • One plated loop or probe pad per TP_Pxx, at least 1.5 mm exposed diameter.
  • One separate TP_SHELL.
  • Silkscreen labels must remain readable with both connectors installed.

4.2 Logic-analyzer header

Use a dual-row 2.54 mm header with one signal and one return position per channel:

H_ANALYZER
1  TP_P01     2  RETURN
3  TP_P02     4  RETURN
...           ...

All RETURN positions connect to a solder-selectable return bus. Provide a three-pad solder selector so that bus can be connected to exactly one of:

  • a neutral contact net later confirmed as signal ground;
  • SHELL; or
  • nothing (factory default).

The default manufactured board must leave the return bus disconnected. After the pinout is measured, mark the selected ground contact on the board and in the capture log. A keyed/shrouded header is preferred if space permits.

5. PCB construction and layout

  • Two-layer FR-4, 1.6 mm nominal thickness, 1 oz copper is adequate unless the connector mechanics require a different edge thickness.
  • Minimum finished trace width/spacing: 0.20/0.20 mm or larger.
  • Route each pass-through net directly and keep it short. Target less than 50 mm between mating contacts.
  • Use 0.50 mm or wider pass-through traces where connector pitch allows.
  • Route analyzer branches away from adjacent pass-through traces and keep them shorter than 40 mm before the series resistor.
  • Do not route signals under exposed metal shell springs where solder mask can be scraped.
  • Add at least two mounting holes or enclosure tabs. Analyzer cables must be restrained to the interposer enclosure, not the console socket.
  • Clearly mark CONSOLE, CABLE, board revision, contact P01 orientation, and PASSIVE—DO NOT DRIVE on both copper/silkscreen where practical.
  • Add exposed continuity pads before and after each connector contact so every assembled path can be tested.

There is no controlled-impedance requirement at the expected low serial data rate. Mechanical correctness and prevention of shorts are more important than transmission-line geometry.

6. Connector numbering convention

The final drawing must contain front-view diagrams. Until then, use this rule:

  • P01 is the leftmost electrical contact when looking directly into the console link port with the console display upright.
  • Numbers increase left to right in that view.
  • J_CABLE numbering is assigned by continuity, so J_CABLE.P01 connects to J_CONSOLE.P01 regardless of how its footprint is mirrored on the PCB.

The PCB layout review must explicitly verify footprint mirroring. This is the most likely place for an otherwise correct interposer to reverse the contact order.

7. Fabrication package and assembly deliverables

Request the following from the PCB designer:

  • editable KiCad project (schematic, PCB, symbols, and footprints);
  • PDF schematic;
  • dimensioned connector and board mechanical drawings;
  • STEP model of the populated interposer;
  • Gerber X2 or standard Gerbers plus Excellon drill files;
  • bill of materials and component-position file;
  • assembly drawing showing connector orientation and P01;
  • bare-board and assembled-board test report;
  • enclosure or strain-relief STEP/STL files if custom mechanics are used.

Order at least one unassembled bare PCB and one sacrificial connector sample before committing the original console or cable to a full insertion test.

8. Connector implementation choices

Use these approaches in preference order:

  1. Exact commercial mating connectors. Identify manufacturer and part numbers and use manufacturer-recommended footprints.
  2. Donor extension/adaptor connectors. Mechanically retain donor connectors and terminate their short leads to large through-hole pads on the interposer. Do not sacrifice the user's only original link cable.
  3. Custom flex-PCB contact tongue plus socket. Appropriate only after accurate measurements and wear testing. Specify hard gold on mating contacts; ordinary ENIG is not intended for repeated edge-contact mating.
  4. Pogo-pin fixture. A clamped, keyed fixture can touch accessible contacts without pretending to be a durable cable connector. This is often the most practical prototype if no receptacle exists.

A PCB house can manufacture a custom contact tongue, but it normally cannot reproduce the console's molded plug/socket body, spring contacts, keying, and latching from Gerbers. Those require sourced parts, donor parts, or a separate mechanical design.

9. Acceptance tests before use

Perform all tests with no console, cartridge, cable, or analyzer connected.

  1. Inspect connector alignment, burrs, exposed copper, and possible shell contact under magnification.
  2. For every Pxx, measure less than 1 ohm from J_CONSOLE.Pxx to the same J_CABLE.Pxx contact.
  3. Verify no continuity from any Pxx to any other Pyy.
  4. Verify TP_Pxx connects to only its matching pass-through net through its fitted resistor; measured resistance should agree with R_TAPxx.
  5. Verify SHELL is isolated from every Pxx and from the return bus with selectors open.
  6. Verify connector insertion using sacrificial or unpowered hardware. It must not require abnormal force or visibly spread/scratch contacts.
  7. Repeat continuity and isolation tests while gently flexing the assembly.

Only after these tests should the interposer be used for the unpowered mapping procedure in physical-capture.md. Measure idle voltages before connecting a logic analyzer. The analyzer is input-only and its ground attaches only to a contact positively identified as signal ground.

10. Information needed to finalize revision A

Supply the PCB/mechanical designer with:

  • sharp, square-on macro photographs of the console port and every face of the cable plug beside a metric ruler;
  • caliper measurements for all dimensions in section 2;
  • a complete cable continuity matrix, including shell;
  • photographs and measurements of the console connector's PCB footprint if a console can be opened safely;
  • desired analyzer connector and enclosure orientation;
  • the logic analyzer model and maximum accepted input voltage.

Once those items are available, replace every N/P0N placeholder, insert the two verified connector footprints, add the dimensioned front-view drawings, and release the resulting files as hardware revision A.